patch-2.4.22 linux-2.4.22/arch/mips/kernel/old-time.c

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diff -urN linux-2.4.21/arch/mips/kernel/old-time.c linux-2.4.22/arch/mips/kernel/old-time.c
@@ -22,7 +22,6 @@
 #include <asm/mipsregs.h>
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/ddb5074.h>
 
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
@@ -94,7 +93,7 @@
 	}
 
 	/* Get last timer tick in absolute kernel time */
-	count = read_32bit_cp0_register(CP0_COUNT);
+	count = read_c0_count();
 
 	/* .. relative to previous jiffy (32 bits is enough) */
 	count -= timerlo;
@@ -414,7 +413,7 @@
 	 * The cycle counter is only 32 bit which is good for about
 	 * a minute at current count rates of upto 150MHz or so.
 	 */
-	count = read_32bit_cp0_register(CP0_COUNT);
+	count = read_c0_count();
 	timerhi += (count < timerlo);	/* Wrap around */
 	timerlo = count;
 
@@ -425,7 +424,7 @@
 	 * we need only ask for the next in r4k_interval counts. On other
 	 * archs we have a real timer, so we don't want this.
 	 */
-	write_32bit_cp0_register (CP0_COMPARE,
+	write_c0_compare(
 				  (unsigned long) (count + r4k_interval));
         kstat.irqs[0][irq]++;
 #endif
@@ -512,8 +511,8 @@
 	xtime.tv_usec = 0;
 	write_unlock_irq (&xtime_lock);
 
-	if (mips_cpu.options & MIPS_CPU_COUNTER) {
-		write_32bit_cp0_register(CP0_COUNT, 0);
+	if (cpu_has_counter) {
+		write_c0_count(0);
 		do_gettimeoffset = do_fast_gettimeoffset;
 		irq0.handler = r4k_timer_interrupt;
 	}

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