patch-2.2.16 linux/arch/i386/kernel/setup.c

• Lines: 75
• Date: Wed Jun 7 14:26:42 2000
• Orig file: v2.2.15/linux/arch/i386/kernel/setup.c
• Orig date: Wed May 3 17:16:31 2000

diff -urN v2.2.15/linux/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
@@ -23,6 +23,10 @@
  *
  *	Improved Intel cache detection.
  *	Dave Jones <dave@powertweak.com>, October 1999
+ *
+ *	Added proper Cascades CPU and L2 cache detection for Cascades
+ *	and 8-way type cache happy bunch from Intel:^)
+ *	Dragan Stancevic <visitor@valinux.com>, May 2000
  */
 
 /*
@@ -98,7 +102,7 @@
 
 extern int root_mountflags;
 extern int _etext, _edata, _end;
-extern unsigned long cpu_hz;
+extern unsigned long cpu_khz;
 
 /*
  * This is set up by the setup-routine at boot-time
@@ -770,8 +774,8 @@
 	{ X86_VENDOR_INTEL,	6,
 	  { "Pentium Pro A-step", "Pentium Pro", NULL, "Pentium II (Klamath)", 
 	    NULL, "Pentium II (Deschutes)", "Mobile Pentium II", 
-	    "Pentium III (Katmai)", "Pentium III (Coppermine)", NULL, NULL, 
-	    NULL, NULL, NULL, NULL, NULL }},
+	    "Pentium III (Katmai)", "Pentium III (Coppermine)", NULL,
+	    "Pentium III (Cascades)", NULL, NULL, NULL, NULL, NULL }},
 	{ X86_VENDOR_AMD,	4,
 	  { NULL, NULL, NULL, "486 DX/2", NULL, NULL, NULL, "486 DX/2-WB",
 	    "486 DX/4", "486 DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT",
@@ -847,24 +851,26 @@
 				c->x86_cache_size = 0;
 				break;
 
-			case 0x41:
+			case 0x41: /* 4-way 128 */
 				c->x86_cache_size = 128;
 				break;
 
-			case 0x42:
-			case 0x82: /*Detect 256-Kbyte cache on Coppermine*/ 
+			case 0x42: /* 4-way 256 */
+			case 0x82: /* 8-way 256 */
 				c->x86_cache_size = 256;
 				break;
 
-			case 0x43:
+			case 0x43: /* 4-way 512 */
 				c->x86_cache_size = 512;
 				break;
 
-			case 0x44:
+			case 0x44: /* 4-way 1024 */
+			case 0x84: /* 8-way 1024 */
 				c->x86_cache_size = 1024;
 				break;
 
-			case 0x45:
+			case 0x45: /* 4-way 2048 */
+			case 0x85: /* 8-way 2048 */
 				c->x86_cache_size = 2048;
 				break;
 
@@ -1005,8 +1011,8 @@
 			p += sprintf(p, "stepping\t: unknown\n");
 
 		if (c->x86_capability & X86_FEATURE_TSC) {
-			p += sprintf(p, "cpu MHz\t\t: %lu.%06lu\n",
-				cpu_hz / 1000000, (cpu_hz % 1000000));
+			p += sprintf(p, "cpu MHz\t\t: %lu.%03lu\n",
+				cpu_khz / 1000, cpu_khz % 1000);
 		}
 
 		/* Cache size */